Some processors include event counters. The event counters count events that occur during execution. By way of example, the events may include instructions retired, branch instructions retired, cache references, cache misses, or bus accesses, to name just a few examples.
FIG. 1 is a block diagram illustrating a conventional approach 100 for counting events in a logic device. The events occur in sequence from top to bottom during execution time 102.
Conventional event counts 104 of a conventional event counter are shown to the right-hand side in parenthesis. Initially, M events 106 occur and are counted during committed execution. Subsequently, N events I 08 occur and are counted during execution that is ultimately aborted and/or un-committed. Bold lines 110 demarcate the N events that occur during the execution that is ultimately aborted and/or un-committed. As shown, the event counter would count through the values (M−1), (M), (M+1), (M+2), . . . (M+N), (M+N+1).
The conventional event counter counts all events that occur during both committed and un-committed execution in the final event count. Notice in the illustration that the event counter counts the event immediately following the N events that occur during the execution that is ultimately aborted and/or un-committed as (M+N+1).